The present disclosure relates to semiconductor devices and methods of forming such devices using an embedded L-shape spacer.
Both theoretical and empirical studies have demonstrated that carrier mobility in metal oxide semiconductor field effect transistors (MOSFET's) can be greatly increased when a stress of sufficient magnitude is applied to the conduction channel region of a transistor to create a strain therein.
Accordingly, it has been proposed to increase the performance of MOSFET's by applying a stress enhancement layer to the channel regions. Most prior art methods require the use of multiple spacers and multiple etching steps. Unfortunately, the use of multiple spacers can lead to significant processing costs and the use of multiple etching steps, particularly when etching causing significant recesses in the silicon layers and/or etching away of silicide, which can lead to decreased transistor performance.
Therefore, there is a need for methods that overcome and/or mitigate one or more of the above and or other deleterious effects of prior art methods.